Photonic computing: doing AI arithmetic with light

Photonic computing uses light, rather than electrical signals, to carry out calculations. Much of the work in modern AI is multiplying large grids of numbers, called matrices. Ordinary chips do this with electrons moving through transistors. Photonic chips try to do some of the same sums with light, which can travel along tiny channels on a chip and carry several signals at different colours at once.

It matters because AI data centres use very large amounts of electricity, and a lot of that goes on moving and processing numbers. If light could do some of that work with less energy, it could ease some of the power and cost limits on AI hardware. The evidence so far is early. Laboratory chips have run small neural networks, one packaged system has run a specialised optimisation workload, and one company processor has run standard AI models. Nothing reviewed here shows, through independent testing, a photonic chip beating electronic hardware on real AI work.

How the idea works

Photonic chips guide light along waveguides and split, mix and phase-shift it. By setting these controls, a chip can apply a matrix to an input that has been encoded in light. A 2022 review by Zhou and colleagues describes three main approaches to optical matrix multiplication: plane light conversion, Mach-Zehnder interferometers and wavelength division multiplexing. The last of these sends several colours of light through one channel, so that many calculations can run side by side.

What has been demonstrated

These results come from peer-reviewed papers, but each has conditions that limit what it shows.

• 2021, a tensor core. Feldmann and colleagues described parallel convolutional processing on an integrated photonic tensor core. The abstract reports throughput in trillions of multiply-accumulate operations per second, and the device uses phase-change memory arrays. This is a device throughput figure, not an accuracy on an AI task.
• 2021, an 11 TOPS accelerator. Xu and colleagues reported an optical convolutional accelerator running at more than ten trillion operations per second in their test system. It recognised handwritten digits with 88% accuracy in an optical neural network with ten output neurons.
• 2025, a small silicon network. Wu and colleagues built a silicon photonic chip of about 17 mm2 with two convolutional and two fully connected layers. It was trained in situ on 100 handwritten-digit images and tested on another 100. On this four-class task it reached 90% test accuracy with a partially coherent light source, against 87% for the same kind of network run with a narrow-linewidth laser. The 94% figure in the abstract is the training accuracy. A two-class fashion task reached 96%, but the abstract does not give a test split for it. The authors calculate 121.7 picojoules per operation, but that figure comes from a total system power of 10.57 W, which includes the laser and external electronics. The full text also gives a latency of 4.1 ns per inference (full text).
• 2025, a packaged accelerator. Hua and colleagues reported a system with more than 16,000 photonic components, clocked at up to 1 GHz, with latency as small as 3 ns per cycle. It is packaged with a cointegrated electronics chip that handles logic, memory and control. The authors used it for heuristic solvers of Ising optimisation problems. The abstract we checked gives no energy figure, and it does not show that arbitrary AI models run on the system.
• 2025, a processor running standard AI models. Ahmed and colleagues, at the company Lightmatter, describe a photonic AI processor that runs ResNet, BERT and an Atari deep reinforcement learning algorithm. The abstract says it achieves "near-electronic precision for many workloads". The abstract does not give speed or energy figures.

What is reported but not independently checked

Some claims rest on company statements or press coverage, and the conditions behind them are often missing.

The Physics magazine article on Ahmed and colleagues' processor reports figures that we have not found in the paper's abstract. Lightmatter's chief executive is quoted as saying the chip was designed for 400 trillion operations per second but reached around 80 trillion. The article also says the chip achieved 7 to 10 bit precision and is "at least 10 times more energy-efficient than traditional GPUs", without naming the GPU, the workloads or the test conditions. We treat these as reported, not demonstrated.

On the networking side, NVIDIA announced co-packaged optics switches on 18 March 2025. Its announcement claims 3.5 times more power efficiency, four times fewer lasers and ten times better network resiliency, each against unspecified "traditional methods". These are company claims, not independent measurements. The switches use light to move data. The announcement does not describe optical arithmetic, so the switches should not be read as photonic computing.

What is speculative

A 2020 Perspective by Wetzstein and colleagues notes that AI tasks need fast, low-power accelerators, and that AI inference, especially for visual computing, may offer opportunities for optical systems. It also states that general-purpose optical computing systems have yet to mature into a practical technology. That is a proposal, not a demonstrated result. Feldmann and colleagues and Xu and colleagues both name autonomous driving as a possible use, but neither paper tests it.

Limits and open problems

• Converting between light and electronics. Chips still rely on electronics for control, memory and conversion. The Physics article notes analogue noise, integration difficulties and high energy costs for moving data between chips, and quotes Lightmatter's chief executive saying that data movement, not computation speed, is a major bottleneck in AI systems.
• Precision. Ahmed and colleagues state that, before their work, no photonic chip had reached the precision practical AI needs. We have not seen the 7 to 10 bit range reported in press coverage of their processor tested independently.
• Memory. The 2025 packaged accelerator depends on a separate electronic chip for memory, so memory access is not solved optically.
• Benchmark choice. The silicon network was trained and tested on 100 digit images each, and the packaged accelerator on a heuristic optimisation solver. Ahmed and colleagues note that earlier photonic demonstrations were limited to simplified benchmarks.
• Energy accounting. Energy figures use different boundaries. The 121.7 picojoule figure includes the laser and electronics, and the company and press energy claims give no matching baseline.
• Manufacturing. Photonic circuits must be made and tuned precisely. Hua and colleagues point to the relative immaturity of integrated photonics manufacturing and packaging, and the Physics article notes integration difficulties. No source reviewed shows volume manufacturing or yield.

What to watch next

• An independent comparison of a photonic accelerator with an optimised GPU, at matched accuracy, with energy measured for the whole system.
• Photonic computing tested on larger models, with input and output conversion, memory and laser power all included in the energy figure.
• Independent groups reproducing the accuracy and speed results of Hua and colleagues, or of Ahmed and colleagues.
• Whether NVIDIA's photonic switches reached customers on the dates it stated. In March 2025 it said Spectrum-X Photonics Ethernet switches would come in 2026; we have not checked whether they have shipped as of October 2026. These are interconnect products, so they show progress in optical links rather than optical arithmetic.