Superconducting quantum computers
Also known as Superconducting qubits, Transmon quantum processors, Superconducting quantum processors
Superconducting quantum computers use tiny electrical circuits, cooled until they lose all electrical resistance, to store and process quantum information. Google has shown error-correction memory results on its superconducting chips, and IBM reports gate-quality figures for its own processors, but the machines are still research-scale and far from running long, useful fault-tolerant calculations.
In plain language
A superconducting quantum computer is built from tiny electrical circuits made of metal that carries current with no resistance when it is cold enough. Each circuit acts as a quantum bit, or qubit, whose energy levels can hold information in ways an ordinary computer bit cannot. To keep those levels stable, the chips sit inside large cooling systems called dilution refrigerators, and wires carry control signals in and out of the cold chip.
The main problem is noise. Qubits lose their information and make errors, so researchers link many physical qubits together to make one more reliable logical qubit. In December 2024 Google reported a memory of this kind that became more reliable as it grew, which is the behaviour needed for large machines. The chips are still small, and errors remain too frequent for the long calculations that would make them useful.
Technical explanation
Most superconducting qubits are transmons. Koch and colleagues (2007) designed the transmon by operating a Cooper pair box at a much larger ratio of Josephson energy to charging energy. They predicted that this gives a large reduction in sensitivity to charge noise, because the charge dispersion falls off exponentially as that ratio grows. Qubits are controlled with microwave pulses and read out through resonators. Device quality is usually reported as two-qubit gate error or as a benchmark such as IBM's error per layered gate (EPLG), but the reported figures depend on the qubits chosen, circuit depth and measurement method, so they are hard to compare across companies.
Error correction is the central test of scale. Google's Willow chip ran a distance-7 surface code memory on 101 qubits, with a logical error rate of 0.143% ± 0.003% per error-correction cycle. Each increase of code distance by two cut the logical error per cycle by a factor of 2.14 ± 0.02, the scaling that marks operation below threshold. The logical memory lasted 2.4 ± 0.3 times longer than the best physical qubit on the chip. A real-time decoder at distance 5 ran for up to a million cycles, with an average latency of 63 microseconds against a cycle time of 1.1 microseconds. These results come from memory experiments, not from running an algorithm.
Wiring and cooling set a practical limit on scale. Every qubit needs control and readout lines, and the coaxial cables add heat to the cold stages of a dilution refrigerator, both passively through their materials and actively through dissipated signals. Krinner and colleagues (2019) measured the passive heat load of stainless steel and NbTi coaxial cables and the active load from signal dissipation, and describe a thermal anchoring approach for cryogenic setups aimed at 100-qubit-scale systems. IBM's 2025 announcements point towards qLDPC error-correcting codes, and its experimental Loon processor demonstrates components that IBM says these codes need.
What the evidence says
Each statement is typed by the strength of its evidence and linked to the source that supports it.
Demonstrated Shown in a published experiment, test or shipping product.
A distance-7 surface code memory on Willow, using 101 qubits, reached a logical error rate of 0.143% ± 0.003% per error-correction cycle.
Sources: [3], [2] · AbstractIncreasing the code distance by two reduced the logical error per cycle by a factor of Λ = 2.14 ± 0.02, and the logical memory outlived the best physical qubit on the chip by a factor of 2.4 ± 0.3.
Sources: [3] · AbstractA real-time decoder at distance 5 ran for up to a million cycles, with an average latency of 63 microseconds against a cycle time of 1.1 microseconds.
Sources: [3] · AbstractKrinner and colleagues measured the passive heat load of stainless steel and NbTi coaxial cables and the active load from signal dissipation, and describe a thermal anchoring approach for cryogenic setups aimed at 100-qubit-scale systems.
Sources: [7] · Abstract · medium confidenceReported, unverified Stated by a company or team but not independently confirmed.
IBM states that 57 of Heron's 176 couplers deliver less than one error in every 1,000 operations.
Sources: [5] · Heron section · medium confidenceIBM's hardware page lists a quality figure (EPLG) of 3.7E-3 for the Heron family and for Nighthawk, without stating the qubit subset, circuit depth or date used.
Sources: [6] · Processor list · low confidenceIBM's Nighthawk has 120 qubits and 218 couplers, and its experimental Loon processor demonstrates components that IBM says its qLDPC error-correcting codes need.
Sources: [5], [6] · Nighthawk and Loon sections · medium confidenceGoogle reports that its random circuit sampling run on Willow took under five minutes, which it estimates would take one of today's fastest supercomputers about 10^25 years; Google also states that this benchmark has no known real-world applications.
Sources: [4] · Benchmark section · medium confidenceProposed A design or plan that has not yet been built or tested.
Koch and colleagues predicted that the transmon, operated at a much larger ratio of Josephson energy to charging energy, greatly reduces sensitivity to charge noise compared with the Cooper pair box.
Sources: [1] · AbstractLimitations and open problems
- The Willow results are quantum memory experiments. They store quantum information but do not run a useful fault-tolerant algorithm (Acharya and colleagues, 2024).
- Vendors report gate and benchmark figures under different conditions. IBM's hardware page lists an EPLG of 3.7E-3 for the Heron family and for Nighthawk, but gives no qubit subset, circuit depth or date, so these figures cannot be compared directly.
- Rare correlated error events limit repetition-code runs up to distance 29, so long memories are not yet limited by ordinary errors alone (Acharya and colleagues, 2024).
- Every control line adds heat to the dilution refrigerator, so wiring and cooling must be engineered as the qubit count grows (Krinner and colleagues, 2019).
- Google describes its random circuit sampling benchmark on Willow as having no known real-world applications. Its classical comparison is Google's own estimate.
- The evidence reviewed here covers Google and IBM only. Other superconducting groups and companies are not assessed in this profile.
Possible future uses
Ideas, not predictions. None of these has been demonstrated.
- Chemistry and materials simulations of molecules that are too large for classical methods, once error-corrected machines can run long algorithms.
- Optimisation problems in logistics and finance, if quantum speedups prove to hold up against improved classical methods.
- Breaking some widely used public-key encryption schemes, a long-term concern that would need large fault-tolerant machines.
Timeline
- 12 Oct 2007Koch and colleagues publish the transmon design in Physical Review A, predicting much lower sensitivity to charge noise than the Cooper pair box. Sources: [1]
- 28 May 2019Krinner and colleagues publish a measured cryogenic wiring study aimed at 100-qubit-scale superconducting systems. Sources: [7]
- 24 Aug 2024Google Quantum AI posts its below-threshold surface code preprint on arXiv, reporting a 101-qubit distance-7 memory. Sources: [3]
- 9 Dec 2024Google announces the 105-qubit Willow chip, and the below-threshold surface code paper is published online in Nature. Sources: [4], [2]
- 12 Nov 2025IBM announces the 120-qubit Nighthawk processor and the experimental Loon processor, and says it expects quantum advantage by the end of 2026. Sources: [5]
Futures this could help bring about
Related breakthroughs
Glossary
- Transmon
- A superconducting qubit design with a large ratio of Josephson energy to charging energy, which makes it much less sensitive to charge noise.
- Logical qubit
- A more reliable qubit encoded across many physical qubits so that errors can be detected and corrected.
- Code distance
- A measure of how many physical errors an error-correcting code can tolerate; larger distance means more physical qubits per logical qubit.
- Dilution refrigerator
- A cryostat that cools superconducting chips to very low temperatures using a mixture of helium isotopes.
Sources
- peer reviewed paper
Charge-insensitive qubit design derived from the Cooper pair box
Jens Koch, Terri M. Yu, Jay Gambetta et al.. Physical Review A, 12 Oct 2007. DOI: 10.1103/PhysRevA.76.042319. Accessed 21 Oct 2026. - peer reviewed papercorrected
Quantum error correction below the surface code threshold
Google Quantum AI and Collaborators. Nature, 9 Dec 2024. DOI: 10.1038/s41586-024-08449-y. Accessed 21 Oct 2026. - preprint
Quantum error correction below the surface code threshold
Rajeev Acharya, Google Quantum AI and Collaborators. arXiv, 24 Aug 2024. Accessed 21 Oct 2026. - company announcement
Google Willow quantum chip announcement
Google (The Keyword blog), 9 Dec 2024. Accessed 21 Oct 2026. - company announcement
Scaling for quantum advantage and beyond
IBM Quantum, 12 Nov 2025. Accessed 21 Oct 2026. - company announcement
IBM Quantum Computing: hardware
IBM Quantum, Nov 2025. Accessed 21 Oct 2026. - peer reviewed paper
Engineering cryogenic setups for 100-qubit scale superconducting circuit systems
S. Krinner, S. Storz, P. Kurpiers et al.. EPJ Quantum Technology, 28 May 2019. DOI: 10.1140/epjqt/s40507-019-0072-0. Accessed 21 Oct 2026.
Revision history
3 changes since this profile was created.
What it took to get here
The inventions this technology was built on, oldest foundations at the top. Lines show what each one required.
- 2007Superconducting quantum computersResearch and prototypesRequires: Quantum error correction. Being researched.